发明名称
摘要 <P>PROBLEM TO BE SOLVED: To achieve easy and accurate interlayer alignment in manufacturing a semiconductor apparatus with multilayered structure. <P>SOLUTION: A method of manufacturing the semiconductor apparatus includes a process for forming a third conductor pattern on a lamination structure constituted of a first insulating film including a first conductor pattern, and a second insulating film formed on the first insulating film, including a second conductor pattern. In the method, a first misalignment amount between the first conductor pattern and the second conductor pattern is measured. A second misalignment amount between the second conductor pattern and the third conductor pattern is measured. The third conductor pattern is formed by etching on the second insulating film, and a third misalignment amount between the third conductor pattern and the first conductor pattern is measured by observing an alignment mark contained in the patterned third conductor pattern and the first insulating film. A corrected misalignment amount is obtained by correcting the second misalignment amount based on the first and third misalignment amounts. <P>COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP4714777(B2) 申请公布日期 2011.06.29
申请号 JP20090016431 申请日期 2009.01.28
申请人 发明人
分类号 H01L21/027;G03F7/20;H01L21/3213 主分类号 H01L21/027
代理机构 代理人
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