| 摘要 |
<p>PURPOSE: A macro model structure of a semiconductor device is provided to improve the accuracy of an on resistance by respectively adding a parasitic resistance to a drain and a source even through the total width of an LDMSO(Laterally Double Diffused Metal Oxide Semiconductor) increases. CONSTITUTION: A macro model structure of a semiconductor device includes a first parasitic resistance(20) and a variable resistance(10) at a drain and a second parasitic resistance at a source. The variable resistance depends on a voltage between the gate and source and a voltage between the drain and source. The gate is comprised of a poly gate with a plurality of fingers. The values of the first and second parasitic resistances are set according to the surface resistance of metal connecting sources and metal connecting drains in a semiconductor, the number of fingers, the pitch between fingers, and the width of each finger.</p> |
