发明名称 CONTROL SIGNAL GENERATING CIRCUIT OF FULL-BRIDGE CONVERTER
摘要 PURPOSE: A control signal generation circuit of a full bridge converter is provided to implement zero voltage switching(ZVS) by using cheap and simple passive elements as preventing the problem of various noise. CONSTITUTION: A control signal generation circuit(100) includes a pulse width control part(110) and a ZVS driving signal generation part(120). The pulse width control part controls a feedback signal according to a command inputted from a user. The ZVS driving signal generation part is composed of passive elements. The ZVS driving signal generation part generates a driving signal by shifting the phase of a PWM signal through logic operation. A front switching module(310) and a rear switching module(320) are used as a bulk semiconductor switch.
申请公布号 KR20110072564(A) 申请公布日期 2011.06.29
申请号 KR20090129546 申请日期 2009.12.23
申请人 KEOCHANG PROVINCIAL COLLEGE 发明人 YOUN, KYUNG SUP;LEE, JAE CHEOL
分类号 H02M7/48;H02M3/155 主分类号 H02M7/48
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