| 摘要 |
<p>A cache unit comprising a register file that selects an entry indicated by a cache index of n bits (n is a natural number) that is used to search for an instruction cache tag, using multiplexer groups having n stages respectively corresponding to the n bits of the cache index. Among the multiplexer groups having n stages, a multiplexer group in an m th stage has 2 (m-1) multiplex circuits. The multiplexer group in the m th stage uses a value of an m th bit (m is a natural number equal to or less than n) from the least significant bit in the cache index as a control signal. The multiplexer group in the m th stage switches all multiplex circuits included in the multiplexer group in the m th stage in accordance with the control signal.</p> |
