发明名称 |
Systems and methods for efficient generation of hash values of varying bit widths |
摘要 |
A technique for producing a hashed output of an input message according to any number of hash algorithms (e.g. SHA-256, SHA-348, SHA-512) having varying bit widths is described. At least a portion of the input message is stored in a first group of registers each having a bit width equal to a first bit width (e.g. 32 bits). If the selected hash algorithm has a larger bit width (e.g. 64 bits), a remainder of the input message is stored in a second plurality of registers each having a bit width equal to the first bit width. The hashed output is then computed according to the selected hash algorithm.
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申请公布号 |
US7970128(B2) |
申请公布日期 |
2011.06.28 |
申请号 |
US20070781097 |
申请日期 |
2007.07.20 |
申请人 |
FREESCALE SEMICONDUCTOR, INC. |
发明人 |
TORLA MICHAEL J. |
分类号 |
H04K1/00;H04L9/00;H04L9/28 |
主分类号 |
H04K1/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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