发明名称 Low-latency method and apparatus of GHASH operation for authenticated encryption Galois Counter Mode
摘要 Disclosed is a low-latency method and apparatus of GHASH operation for authenticated encryption Galois Counter Mode (GCM), which simultaneously computes three interim values respectively yielded from the additional authenticated data A, the ciphertext C, and the hash key H defined in the GCM. Then, the output of the GHASH operation may be derived. Assuming that A has m blocks and C has n blocks, this disclosure performs the GHASH operation with max {m,n}+1 steps. The input order for the additional authenticated data A and the ciphertext C may be independent. A disordered sequence for the additional authenticated data A and the ciphertext C may also be accepted by this disclosure. This allows the applications in GCM to be more flexible.
申请公布号 US7970130(B2) 申请公布日期 2011.06.28
申请号 US20070858906 申请日期 2007.09.21
申请人 INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE 发明人 YEN CHIH-HSU
分类号 H04K1/00;H04L1/00;H04L9/00 主分类号 H04K1/00
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