发明名称 Capacitance-to-voltage interface circuit with shared capacitor bank for offsetting and analog-to-digital conversion
摘要 A capacitance-to-voltage interface circuit includes a capacitive sensing circuit, an amplification circuit adapted for selective coupling to the capacitive sensing circuit, a capacitor bank comprising a plurality of binary-weighted capacitors, and a switching architecture associated with the capacitive sensing circuit, the amplification circuit, and the capacitor bank. The switching architecture reconfigures the capacitance-to-voltage interface circuit for operation in a plurality of different phases, including an amplification phase and an analog-to-digital conversion phase. During the amplification phase, the capacitor bank is utilized for offsetting capacitance of the amplification circuit. During the analog-to-digital conversion phase, the capacitor bank is utilized in a successive approximation register.
申请公布号 US7969167(B2) 申请公布日期 2011.06.28
申请号 US20090360934 申请日期 2009.01.28
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 KHANNA ASHISH;JO SUNG JIN
分类号 G01R27/26 主分类号 G01R27/26
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