发明名称 Multi-terminal chalcogenide logic circuits
摘要 Logic circuits are disclosed that include one or more three-terminal chalcogenide devices. The three-terminal chalcogenide devices are electrically interconnected and configured to perform one or more logic operations, including AND, OR, NOT, NAND, NOR, XOR, and XNOR. Embodiments include series and parallel configurations of three-terminal chalcogenide devices. The chalcogenide devices include a chalcogenide switching material as the working medium along with three electrical terminals in electrical communication therewith. In one embodiment, the circuits include one or more input terminals, one or more output terminals, and a clock terminal. The input terminals receive one or more input signals and deliver them to the circuit for processing according to a logic operation. Upon conclusion of processing, the output of the circuit is provided to the output terminal. The clock terminal delivers a clock signal to facilitate operation of the three-terminal devices included in the instant circuits. In one embodiment, the clock signal includes an ON cycle and an OFF cycle, where the circuit performs a logic operation during the ON cycle and any three-terminal devices that are switched to the conductive state during the ON cycle are returned to their resistive state during the OFF cycle.
申请公布号 US7969769(B2) 申请公布日期 2011.06.28
申请号 US20070724485 申请日期 2007.03.15
申请人 OVONYX, INC. 发明人 LOWREY TYLER
分类号 G11C11/00 主分类号 G11C11/00
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