发明名称 PARITY GENERATING APPARATUS AND MAP APPARATUS FOR TURBO DECODING
摘要 An apparatus for generating a parity bit for turbo decoding, and a MAP (Maximum A Posteriori) apparatus are provided. The apparatus for generating a parity bit for turbo decoding includes: a index converter calculating forward and reverse state matrices with respect to a parity bit by maintaining or changing the relationship between the forward and reverse state matrices with respect to information bits and input symbols according to an encoder state; and a parity calculation unit calculating a parity bit by using the forward and reverse state matrices calculated by the parity state matric calculation unit.
申请公布号 US2011154149(A1) 申请公布日期 2011.06.23
申请号 US20100972289 申请日期 2010.12.17
申请人 ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE 发明人 JEON IN SAN;KIM HYUK;CHO HAN JIN
分类号 H03M13/05;G06F11/10 主分类号 H03M13/05
代理机构 代理人
主权项
地址