发明名称 |
TRIGGERING WORKAROUND CAPABILITIES BASED ON EVENTS ACTIVE IN A PROCESSOR PIPELINE |
摘要 |
A method, information processing system, and processor work around a processing flaw in a processor. At least one instruction is fetched from a memory location. The at least one instruction is decoded. An opcode compare operation is compared with the at least one instruction and a set of values within at least one opcode compare register in response to the decoding. The instruction is marked with a pattern based on the opcode compare operation. The pattern indicates that the instruction is associated with a processing flaw. |
申请公布号 |
US2011154107(A1) |
申请公布日期 |
2011.06.23 |
申请号 |
US20090645771 |
申请日期 |
2009.12.23 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
ALEXANDER GREGORY W.;BUSABA FADI;SCHROTER DAVID A.;SCHWARZ ERIC;THOMPTO BRIAN W.;WARD, III WESLEY J. |
分类号 |
G06F11/14;G06F9/30;G06F9/312;G06F11/07 |
主分类号 |
G06F11/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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