发明名称 METHOD AND SYSTEM FOR SPECIFYING SYSTEM LEVEL CONSTRAINTS IN A CROSS-FABRIC DESIGN ENVIRONMENT
摘要 A method of specifying system level constraints for connecting an interface of an electronic device between first and second fabrics includes specifying one or more first condition relating to a placement of the interface, specifying one or more second condition relating to a connection of a net in the interface between the first and second fabrics, generating one or more first equation expressing the first condition as a function of the location of the connectors, generating one or more second equation expressing the second condition as a function of the location of connectors, generating one or more third equation expressing an optimality criterion for the interface, and outputting the one or more first equation, the one or more second equation and the one or more third equation to a data file in a computer readable format.
申请公布号 US2011153289(A1) 申请公布日期 2011.06.23
申请号 US20090646118 申请日期 2009.12.23
申请人 CADENCE DESIGN SYSTEMS, INC. 发明人 BHATTACHARYA UTPAL;KOHLI VIKAS;BERI TARUN;VERMA RAHUL
分类号 G06F17/10;G06F17/50 主分类号 G06F17/10
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