发明名称 Apparatus and Method for Controlling Semiconductor Die Warpage
摘要 A semiconductor die has through silicon vias arranged to reduce warpage. The through silicon vias adjust the coefficient of thermal expansion of the semiconductor die, permit substrate deformation, and also relieve residual stress. The through silicon vias may be located in the edges and/or corners of the semiconductor die. The through silicon vias are stress relief vias that can be supplemented with round corner vias to reducing warpage of the semiconductor die.
申请公布号 US2011147895(A1) 申请公布日期 2011.06.23
申请号 US20090640111 申请日期 2009.12.17
申请人 QUALCOMM INCORPORATED 发明人 BAI XUE;RAY URMI
分类号 H01L23/00;G06F17/50;H01L21/768 主分类号 H01L23/00
代理机构 代理人
主权项
地址