发明名称 |
Non-volatile single-event upset tolerant latch circuit |
摘要 |
A non-volatile single-event upset (SEU) tolerant latch is disclosed. The non-volatile SEU tolerant latch includes a first and second inverters connected to each other in a cross-coupled manner. The gates of transistors within the first inverter are connected to the drains of transistors within the second inverter via a first feedback resistor. Similarly, the gates of transistors within the second inverter are connected to the drains of transistors within the first inverter via a second feedback resistor. The non-volatile SEU tolerant latch also includes a pair of chalcogenide memory elements connected to the inverters for storing information.
|
申请公布号 |
US7965541(B2) |
申请公布日期 |
2011.06.21 |
申请号 |
US20080525458 |
申请日期 |
2008.11.25 |
申请人 |
BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC.;OVONYX, INC. |
发明人 |
LI BIN;RODGERS JOHN C.;HADDAD NADIM F. |
分类号 |
G11C11/00 |
主分类号 |
G11C11/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|