发明名称 Method and system for approximate placement in electronic designs
摘要 Disclosed are method, system, and computer program product for a method and system for a fast and stable placement/floorplanning method that gives consistent and good quality results. Various embodiments of the present invention provide a method and system for approximate placement of various standard cells, macro-blocks, and I/O pads for the design of integrated circuits by approximating the final shapes of the objects of interest by one or more probability distribution functions over the areas for the objects of interest with improved runtime and very good stability. These probability distributions are gradually localized to final shapes satisfying the placement constraints and optimizing an objective function.
申请公布号 US7966595(B1) 申请公布日期 2011.06.21
申请号 US20070838187 申请日期 2007.08.13
申请人 CADENCE DESIGN SYSTEMS, INC. 发明人 CHONG PHILIP;SZEGEDY CHRISTIAN
分类号 G06F17/50 主分类号 G06F17/50
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