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发明名称
FAST DCT ALGORITHM FOR DSP WITH VLIW ARCHITECTURE
摘要
申请公布号
KR101041760(B1)
申请公布日期
2011.06.17
申请号
KR20087010725
申请日期
2006.10.05
申请人
发明人
分类号
G06F17/14;G06F9/38;G06F17/10
主分类号
G06F17/14
代理机构
代理人
主权项
地址
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