| 摘要 |
PROBLEM TO BE SOLVED: To improve the speed of an eDRAM. SOLUTION: A semiconductor memory has memory blocks 1-1 to 1-N, and local buses 5-1 and 5-2. A control circuit 11-1 of each of the memory blocks 1-1 to 1-N supplies a selection signal YSW1 to transistors 4-1a and 4-1b, and connects a bit line pair BL1 and BL1<SP>-</SP>to the local buses 5-1 and 5-2 when the bit line pair BL1 and BL1<SP>-</SP>of a memory block is specified by a decoded column address in a read operation. A dummy local bus 10 is precharged to a potential VDD before the read operation. A control circuit 11-5 supplies a potential GND to the dummy local bus 10 according to a selection signal YSWj in the read operation. The control circuit 11-1 stops output of the selection signal YSW1 when the potential of the dummy local bus 10 decreases from the potential VDD to a set potential Vst in the read operation. COPYRIGHT: (C)2011,JPO&INPIT |
