发明名称 Engineering Change Order Language for Modifying Integrated Circuit Design Files for Programmable Logic Device Implementation
摘要 In an embodiment, a method to automatically process modifications to a set of design files is contemplated. The design files describe at least a portion of an integrated circuit design, and may be coded in a hardware description language. The modifications may be made to prepare the design files for inclusion in a programmable logic device implementation of the integrated circuit (or portion thereof). Specifically, the modifications may be specified using a set of commands which may be assembled by a user.
申请公布号 US2011145779(A1) 申请公布日期 2011.06.16
申请号 US20090638152 申请日期 2009.12.15
申请人 CHEN CHIH-ANG 发明人 CHEN CHIH-ANG
分类号 G06F17/50 主分类号 G06F17/50
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