发明名称 High Voltage Bipolar Transistor with Pseudo Buried Layers
摘要 A high voltage bipolar transistor with shallow trench isolation (STI) comprises the areas of a collector formed by implanting first electric type impurities into active area and connected with pseudo buried layers at two sides; Pseudo buried layers which are formed by implanting high dose first type impurity through the bottoms of STI at two sides if active area, and do not touch directly; deep contact through field oxide to contact pseudo buried layers and pick up the collectors; a base deposited on the collector by epitaxial growth and in-situ doped by second electric type impurity, in which the intrinsic base touches local collector and extrinsic base is used for base pick-up; a emitter which is a polysilicon layer deposited on the intrinsic base and doped with first electric type impurities. This invention makes the depletion region of collector/base junction from 1D (vertical) distribution to 2D (vertical and lateral) distribution. The bipolar transistor's breakdown voltages are increased by only enlarge active critical dimension (CD). This is low-cost process.
申请公布号 US2011140239(A1) 申请公布日期 2011.06.16
申请号 US20100966078 申请日期 2010.12.13
申请人 CHIU TZUYIN;CHU TUNGYUAN;QIAN WENSHENG;FAN YUNGCHIEH;HU JUN;LIU DONGHUA;LV YUKUN 发明人 CHIU TZUYIN;CHU TUNGYUAN;QIAN WENSHENG;FAN YUNGCHIEH;HU JUN;LIU DONGHUA;LV YUKUN
分类号 H01L29/70 主分类号 H01L29/70
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