| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a chip-type electric double layer capacitor which may be reduced in size and weight and increased in capacity, allows surface mounting without any additional structure, and has low ESR. <P>SOLUTION: The chip-type electric double layer capacitor includes: an exterior case 110 having a housing space provided therein and formed of insulation resin; first and second external terminals 130a, 130b buried in the exterior case 110, each having a plurality of first surfaces 131a, 131b exposed to the housing space and second surfaces 132a, 132b exposed to an outside of the exterior case 110; and an electric double layer cell 120 electrically connected to the plurality of first surfaces 131a, 131b of the first and second external terminals exposed to the housing space. <P>COPYRIGHT: (C)2011,JPO&INPIT</p> |
