发明名称 |
CONFIGURABLE DIGITAL-ANALOG PHASE LOCKED LOOP |
摘要 |
<p>A phase locked loop (PLL) device is configurable in an analog phase locked loop and a hybrid analog-digital phase locked loop. In an analog mode, at least a phase detector, an analog loop filter, and a voltage controlled oscillator (VCO), are connected to form an analog loop. In a digital mode, at least the phase detector, the voltage controlled oscillator (VCO), a time to digital converter (TDC), a digital loop filter and a digital to analog converter (DAC) are connected to form the hybrid digital-analog loop.</p> |
申请公布号 |
WO2011071954(A1) |
申请公布日期 |
2011.06.16 |
申请号 |
WO2010US59338 |
申请日期 |
2010.12.07 |
申请人 |
QUALCOMM INCORPORATED;DUNWORTH, JEREMY D.;BALLANTYNE, GARY J.;ASURI, BHUSHAN S. |
发明人 |
DUNWORTH, JEREMY D.;BALLANTYNE, GARY J.;ASURI, BHUSHAN S. |
分类号 |
H03L7/089;H03L7/093 |
主分类号 |
H03L7/089 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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