发明名称 a package comprising a first and a second die coupled by a multiplexed bus
摘要 <p>A package comprising a first die; a second die; an interface connecting said first die and said second die, at least one of said first and second dies comprising a memory, said interface being configured to transport both control signals and memory transactions; and multiplexing means for multiplexing said control signals and said memory transactions onto said interface such that a plurality of connections of said interface are shared by said control signals and said memory transactions.</p>
申请公布号 EP2333830(A1) 申请公布日期 2011.06.15
申请号 EP20090425500 申请日期 2009.12.07
申请人 STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED;STMICROELECTRONICS S.R.L. 发明人 JONES, ANDREW MICHAEL;RYAN, STUART;SCANDURRA, ALBERTO
分类号 H01L25/00;G06F13/16 主分类号 H01L25/00
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