METHOD OF CONTROLLING A SEOI DRAM MEMORY CELL HAVING A SECOND CONTROL GATE BURIED UNDER THE INSULATING LAYER

摘要

PURPOSE: A method for controlling a semiconductor-on-insulator(SeOI) dynamic random access memory(DRAM) is provided to reduce the number of decoders using a memory cell with a unitized rear side controlling gate. CONSTITUTION: A front side controlling gate(8) is arranged on the upper side of a channel and is separated from the channel by a gate dielectric(7). A rear side controlling gate(9) is arranged in a base substrate and is separated from the channel by the insulating layer. A first voltage is applied to the front side controlling gate, and a second voltage is applied to the rear side controlling gate. The front side controlling gate and the rear side controlling gate are simultaneously used.