| 摘要 |
PURPOSE: A parallel processing turbo decoding method and an apparatus thereof are provided to reduce electrical power consumption, by considerably reducing memory and processing delay. CONSTITUTION: A decoder includes an interleaver block, a number of MAP decoders(301-325) and a number of memory blocks(410-425). The decoder further includes a switch structure(505). The decoder can perform parallel processing for one block. The MAP decodes process a number of blocks in parallel. The MAP decoder decodes the memory block independently in the switch structure. Each MAP decoder performs decoding through cross-connection with more than one memory block. |
