发明名称 |
Arithmetic method and device of reconfigurable processor |
摘要 |
Provided are an arithmetic method and device of a reconfigurable processor. The arithmetic device includes: an Arithmetic Logic Unit (ALU) for performing an addition and subtraction operation and a logic operation of a binary signal; a multiplier for performing a multiplication operation of the binary signal; a shifter for changing an arrangement of the binary signal; a first operand selector and a second operand selector each for selecting one of values output from the ALU, the multiplier, and the shifter; and an adder for adding the values selected by the first operand selector and the second operand selector.
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申请公布号 |
US7958179(B2) |
申请公布日期 |
2011.06.07 |
申请号 |
US20070978878 |
申请日期 |
2007.10.30 |
申请人 |
ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE |
发明人 |
LYUH CHUN GI;YEO SOON IL;ROH TAE MOON;KIM JONG DAE |
分类号 |
G06F7/38 |
主分类号 |
G06F7/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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