发明名称 Flat-panel display having test architecture
摘要 A flat-panel display having simplified test architecture is disclosed for reducing substrate border area. The flat-panel display includes a plurality of data lines, a plurality of gate lines, a plurality of first conductive lines, a plurality of first one-way switching units, a plurality of second one-way switching units, a plurality of control units and a second conductive line. The gate lines are used to deliver gate signals for use in a test. Each first one-way switching unit functions to allow one-way signal transmission from a corresponding first conductive line to a corresponding gate line. Each second one-way switching unit functions to allow one-way signal transmission from a corresponding first conductive line to the second conductive line. The second conductive line is employed to deliver a corresponding gate signal furnished by a corresponding second one-way switching unit. Each control unit controls inputting of test data signals to one corresponding data line.
申请公布号 US7956946(B2) 申请公布日期 2011.06.07
申请号 US20090394023 申请日期 2009.02.26
申请人 AU OPTRONICS CORP. 发明人 YANG TSUNG-YING;SU KAO-HUI
分类号 G02F1/1333;G01R31/02;G02F1/1345 主分类号 G02F1/1333
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