发明名称 SYSTEME DE VEILLE
摘要 <p>#CMT# #/CMT# The system has a power supply module comprising a PMOS transistor (216) connected between an external power supply source (VDD EXT) and a power supply rail (202) of circuits. A retention module is formed by a diode (226) and a PMOS transistor (234). The transistor of the retention module is connected between the power supply rail of circuits and an internal power supply rail (228) of a memory cell (134). The internal power supply rail is connected to external power supply voltage through a voltage step-down device. #CMT# : #/CMT# Independent claims are also included for the following: (1) an integrated circuit comprising a standby system (2) a method for reducing energy consumption in an integrated circuit. #CMT#USE : #/CMT# Standby system for use in an integrated circuit of an electronic device (all claimed). Uses include but are not limited to mobile telephone, camera, portable computer, MPEG-1 audio layer 3 (MP3)player, portable DVD player and portable game console. #CMT#ADVANTAGE : #/CMT# The system uses single standby control signal for activating/deactivating a standby mode, so that the system is simple to implement, and does not modify a design chain of the integrated circuit and the register transfer language (RTL) code. The transistor of the power supply module cuts the voltage on the power supply rail of circuits, thus improving circuit performance. The system enables the memory cells to operate during the standby mode with reduced supply voltage, thus reducing the energy consumption and the current leakage. The standby system permits precise calibration of a total surface occupied by the step-down device, independent of the number of memory cells. #CMT#DESCRIPTION OF DRAWINGS : #/CMT# The drawing shows a detailed circuit diagram of a part of integrated circuit comprising a standby circuit. VDD EXT : External power supply source 134 : Memory cell 202 : Power supply rail of circuits 216, 234 : PMOS transistors 226 : Diode 228 : Internal power supply rail of memory cell.</p>
申请公布号 FR2936622(B1) 申请公布日期 2011.06.03
申请号 FR20080056523 申请日期 2008.09.29
申请人 DOLPHIN INTEGRATION 发明人 ZANGARA LOUIS;GIRIN REMY;SOILEUX ROMUALD
分类号 G06F1/32 主分类号 G06F1/32
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