发明名称 A PHASE LOCKED LOOP FREQUENCY SYNTHESIZER CIRCUIT WITH IMPROVED NOISE PERFORMANCE
摘要 <p>A phase locked loop frequency synthesizer comprises a voltage controlled oscillator; a loop filter for supplying a control voltage to the oscillator; a phase frequency detector arranged to detect a phase difference between a reference signal and a feedback signal generated from the oscillator signal and generate pulses on detector signals (UP/DN) dependent on the sign of the phase difference; and a charge pump (61) comprising current generating means and controlled switches (64, 65) arranged to convert pulses on the detector signals to current pulses from a reference voltage (Vdd') to a common terminal (Vloop) connected to the loop filter or to current pulses from the common terminal to ground. The current generating means comprises at least one resistor (62, 63) connected between the common terminal and the switches, and the charge pump comprises an operational amplifier (66) coupled to keep the reference voltage at twice the voltage at the common terminal.</p>
申请公布号 WO2011064122(A1) 申请公布日期 2011.06.03
申请号 WO2010EP67557 申请日期 2010.11.16
申请人 ST-ERICSSON SA;NILSSON, MAGNUS;KLEMMER, NIKOLAUS 发明人 NILSSON, MAGNUS;KLEMMER, NIKOLAUS
分类号 H03L7/197;H03L7/089 主分类号 H03L7/197
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