| 摘要 |
<p>The disclosed solid-state imaging device (30) is equipped with: pixel cells (310) which have a photodiode (3101), a charge detection unit (FD) (3103), an amplifying transistor (3104), a transfer transistor (3102) which transfers a signal charge from the photodiode (3101) to the charge detection unit (FD) (3103) in accordance with a transfer control signal, and a reset transistor (3105) which resets the charge detection unit (FD) (3103) in accordance with a reset control signal; a signal processing circuit (36) which captures the electric potential of a pixel signal corresponding to the signal charge transferred to the charge detection unit (FD) (3103) and the pixel reset potential of the charge detection unit (FD) (3103); charge pump circuits (33,34) which step-up or step-down at least the transfer control signal or the reset control signal in response to a drive clock signal; and a control logic circuit (38) which controls the drive clock signal so that the signal is interrupted during the pixel readout interval.</p> |
