| 摘要 |
<P>PROBLEM TO BE SOLVED: To improve the accuracy of the generation of an interpolated compare value and the update control of this compare value, while preventing a further increment of burden in CPU, in a semiconductor device for inverter control which reduces the processing task of CPU and thins the interruption into AD conversion so as to achieve PWM control high in frequency. <P>SOLUTION: The semiconductor device includes a following compare value buffer 20 which stores a following compare value temporarily so as to load it in the compare register 13 of a PWM output waveform generator 10, a load timing control unit 30 which loads the following compare value of the following compare value buffer 20 into a compare register 13 at a load timing generated from a specified timing after generation of PWM output waveform, and a compare value update means 40 with such a hardware configuration as to get the following compare value corresponding to an interruption thinning section in which an interruption accompanying the finish of AD conversion is thinned and to store it in the following compare value buffer 20. <P>COPYRIGHT: (C)2011,JPO&INPIT |
