| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit for suppressing the unnecessary increase in power supply wiring or chip area for improving operation failure due to IR drop, and for appropriately arranging a circuit block whose timing constraint is strict. SOLUTION: This method for designing a semiconductor integrated circuit includes: (a)arranging circuit cells in the layout region of a semiconductor integrated circuit to be designed; (b) calculating power consumption to be consumed in the layout region in which the circuit cells are arranged; (c) executing the IR drop verification of the layout region, and specifying an IR drop occurrence region where IR drop occurs; (d) executing the STA analysis of the layout region, and specifying a critical path; (e) specifying a circuit cell which is not included in the critical path as a movement candidate circuit cell; and (f) moving the movement candidate circuit cell arranged in the IR drop occurrence region to the outside of the IR drop occurrence region. COPYRIGHT: (C)2011,JPO&INPIT
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