发明名称 SILICON-ON-INSULATOR (SOI) STRUCTURE CONFIGURED FOR REDUCED HARMONICS AND METHOD OF FORMING THE STRUCTURE
摘要 Disclosed is semiconductor structure with an insulator layer on a semiconductor substrate and a device layer is on the insulator layer. The substrate is doped with a relatively low dose of a dopant having a given conductivity type such that it has a relatively high resistivity. Additionally, a portion of the semiconductor substrate immediately adjacent to the insulator layer can be doped with a slightly higher dose of the same dopant, a different dopant having the same conductivity type or a combination thereof. Optionally, micro-cavities are created within this same portion so as to balance out any increase in conductivity due to increased doping with a corresponding increase in resistivity. Increasing the dopant concentration at the semiconductor substrate-insulator layer interface raises the threshold voltage (Vt) of any resulting parasitic capacitors and, thereby reduces harmonic behavior. Also disclosed herein are embodiments of a method for forming such a semiconductor structure.
申请公布号 US2011127529(A1) 申请公布日期 2011.06.02
申请号 US20090627343 申请日期 2009.11.30
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 BOTULA ALAN B.;ELLIS-MONAGHAN JOHN J.;JOSEPH ALVIN J.;LEVY MAX G.;PHELPS RICHARD A.;SLINKMAN JAMES A.;WOLF RANDY L.
分类号 H01L27/12;H01L21/762 主分类号 H01L27/12
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