发明名称 |
High resolution overlapping bit segmented dac |
摘要 |
A controller receives an M-bit input and generates, in response, an S-bit upper range binary data feeding S-bit high range DAC and an R-bit lower range data feeding an R-bit low range DAC. The controller detects transition points in the M-bit input and, in response, adds a transition data to the S-bit data equal to at least one least significant bit of the S-bit data and subtracts a value from the R-bit data equal to the transition data. The transition points and the transition data are detected and added at points avoiding such transitions at a full scale value of the R-bit data. |
申请公布号 |
EP2328274(A1) |
申请公布日期 |
2011.06.01 |
申请号 |
EP20100192277 |
申请日期 |
2010.11.23 |
申请人 |
NXP B.V. |
发明人 |
MAHOOTI, KEVIN;BO, HE;HAO, MENG;LEE, JOHNNY;FENG, TIAN JIE;YANG, RUI |
分类号 |
H03M1/68;H03M1/06 |
主分类号 |
H03M1/68 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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