发明名称 Process/design methodology to enable high performance logic and analog circuits using a single process
摘要 A method for improving analog circuits performance using a circuit design using forward bias and a modified mixed-signal process is presented. A circuit consisting plurality of NMOS and PMOS transistors is defined. The body terminal of the NMOS transistors are coupled to a first voltage source and the body terminal of the PMOS transistors are coupled a second voltage source. Transistors in the circuit are selectively biased by applying the first voltage source to the body terminal of each selected NMOS transistor and applying the second voltage source to the body terminal of each selected PMOS transistor. In one embodiment, the first voltage source and the second voltage source are modifiable to provide forward and reverse bias to the body terminal of the transistors.
申请公布号 US7952423(B2) 申请公布日期 2011.05.31
申请号 US20080241706 申请日期 2008.09.30
申请人 ALTERA CORPORATION 发明人 XIANG QI;RATNAKUMAR ALBERT;TUNG JEFFREY XIAOQI;DING WEIQI
分类号 G05F1/10 主分类号 G05F1/10
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