发明名称 Performing die-to-wafer stacking by filling gaps between dies
摘要 An integrated circuit structure includes a bottom semiconductor chip; a top die bonded onto the bottom semiconductor chip; a protecting material encircling the bottom die and on the bottom semiconductor chip; and a planar dielectric layer over the top die and the protecting material. The protecting material has a top surface leveled with a top surface of the top die.
申请公布号 US7951647(B2) 申请公布日期 2011.05.31
申请号 US20080140695 申请日期 2008.06.17
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 YANG KU-FENG;CHIOU WEN-CHIH;WU WENG-JIN;SUNG MING-CHUNG
分类号 H01L21/76 主分类号 H01L21/76
代理机构 代理人
主权项
地址