发明名称 DECODING CIRCUIT AND DECODING METHOD THEREOF
摘要 A decoding circuit is adapted for decoding an input signal. The input signal includes at least a break and the time length of the break is a preset time. The decoding circuit includes a decoding unit and a detecting unit. The detecting unit detects whether the voltage level of the input signal is kept at a specific logic level for more than the preset time. If the input signal is kept at the specific logic level for more than the preset time, the detecting circuit, according to the voltage level of the specific logic level, outputs the input signal or the inverted input signal to the decoding unit so as to perform a decoding process.
申请公布号 US2011121748(A1) 申请公布日期 2011.05.26
申请号 US20100915068 申请日期 2010.10.29
申请人 MY-SEMI INC. 发明人 KUO CHUN-TING;LIN CHUN-FU;HSIEH CHENG-HAN
分类号 H05B37/02;H03M7/00 主分类号 H05B37/02
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