DDR COUNTER CIRCUITS, ANALOG TO DIGITAL CONVERTERS, IMAGE SENSORS AND DIGITAL IMAGING SYSTEMS INCLUDING THE SAME

摘要

A counter circuit for an analog to digital converter includes: a latch stage configured to generate a latch stage output clock based on a state of an input clock such that the latch stage output clock and the input clock have a same state at start of a reset counting phase, but a same or different state at start of a signal, counting phase depending on the state of the output clock at the end of the reset counting phase.