发明名称 METHOD AND SYSTEM FOR FORMAL SAFETY VERIFICATION OF MANUFACTURING AUTOMATION SYSTEMS
摘要 A method and system is provided for verifying and certifying the safety logic of a manufacturing automation system including safety logic, where the logic may include one or more safety modules, routines, programs and tasks or a combination thereof; testing specifications corresponding to the safety logic; one or more formal model generators adapted for automatically transforming the safety logic and testing specifications through a logic parser into their respective mathematical models, formatted for example, as a Petri-net or binary decision diagram; a safety logic verifier configured for automatically comparing the safety logic formal model against the testing specification formal model to verify the safety logic model for the purpose of certifying the safety logic. The testing specifications may include testing of safety logic behavior including reaching safe state, remaining in safe state without reset, recovering from safe state with reset and remaining active with false alarm detection.
申请公布号 US2011125302(A1) 申请公布日期 2011.05.26
申请号 US20090604449 申请日期 2009.10.23
申请人 GM GLOBAL TECHNOLOGY OPERATIONS, INC. 发明人 SETHURAMAN NAGARAJAN;SCHROEDER JEROME O.;DE SOUMEN;YUAN CHENGYIN;BILLER STEPHAN R.;GAJOR FRANK;BYRNES JEFFREY J.;HUNSUR NARAHARI K.
分类号 G06F19/00;G05B9/02;G06F11/36 主分类号 G06F19/00
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