发明名称 CLOCK DETECTOR AND BIAS CURRENT CONTROL CIRCUIT
摘要 Provided are a clock detector and a bias current control circuit. The clock detector outputs a digital code corresponding to the frequency of an input clock, and the bias current control circuit controls a bias current supplied to an analog circuit according to the digital code output from the clock detector. Accordingly, when the clock detector and the bias current control circuit are used, it is possible to minimize the power consumption of an analog circuit by controlling a bias current supplied to an analog circuit according to a digital code corresponding to the frequency of an input clock.
申请公布号 US2011121886(A1) 申请公布日期 2011.05.26
申请号 US20100859982 申请日期 2010.08.20
申请人 ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE 发明人 JEON YOUNG DEUK
分类号 G11C5/14;H03M1/50 主分类号 G11C5/14
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