MEMORY INTERFACE CIRCUIT AND DRIVE CAPABILITY ADJUSTMENT METHOD OF MEMORY DEVICE

摘要

Disclosed is a memory interface circuit (114) that is provided with a monitoring-use delay unit (118) for delaying a strobe signal (129) by a first delay amount so as to generate a monitoring-use strobe signal (125); a monitoring-use data latch unit (107) for latching read data (123) as monitoring-use data (126) at a timing indicated by the monitoring-use strobe signal (125); an operational data latch unit (105) for latching the read data (123) as output read data (122); a range calculation unit (110) for calculating a window width (128) which is the width of a range of values for the first delay amount by which the monitoring-use data latch unit (107) can correctly latch the read data (123) as the monitoring-use data (126); and a drive capability setting unit (116) for adjusting the drive capability of a memory device (101) so that the window width (128) widens.