| 摘要 |
The group signature analyzer on the base of a shift register comprises sixteen D-flip-flops, sixteen modulo 2 adders, where the first modulo 2 adder input is connected with the first D-flip-flop input. In it there are fifteen OR elements, where all of D-flip-flop outputs, except the sixteenth one, are connected with the first inputs of corresponding OR elements, the second OR element inputs are connected corresponding modulo 2 adder outputs, corresponding OR element outputs are connected with the following D-flip-flop inputs, the sixteenth, ninth, seventh, fourth D-flip-flop outputs are connected with the first modulo 2 adder input, the other first modulo 2 adder inputs and all other modulo 2 adder are connected those information inputs, the numbers being consistent with nonzero elements of the corresponding matrix state line. |
