发明名称 Data processing apparatus and method for controlling access to memory
摘要 A data processing apparatus and method are provided for controlling access to memory. The data processing apparatus comprises main processing logic operable to execute a sequence of instructions in order to perform a process, and subsidiary processing logic operable to perform at least part of the process on behalf of the main processing logic. A memory is provided that is accessible by the main processing logic when performing the process, the main processing logic defining a portion of the memory to be allocated memory accessible to the subsidiary processing logic when performing part of the process on behalf of the main processing logic. Further, a memory management unit is provided that is programmable by the main processing logic and operable to control access to the allocated memory by the subsidiary processing logic. The main processing logic is arranged to program the memory management unit such that for an access request issued by the subsidiary processing logic relating to the allocated memory, the memory management unit produces a memory address and one or more associated memory attributes identifying one or more properties of the allocated memory at that memory address.
申请公布号 US7949835(B2) 申请公布日期 2011.05.24
申请号 US20050230498 申请日期 2005.09.21
申请人 ARM LIMITED 发明人 KERSHAW DANIEL;FELTON DONALD;STEVENS ASHLEY MILES;THOMPSON ANTHONY PAUL
分类号 G06F12/00;G06F12/10;G06F12/14 主分类号 G06F12/00
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