DAMASCENE GATE HAVING PROTECTED SHORTING REGIONS

摘要

The present invention relates generally to semiconductor devices and, more specifically, to damascene gates (100; Fig 1C) having protected shorting regions (60) and related methods for their manufacture. A first aspect of the invention provides a method of forming a damascene gate (100) with protected shorting regions (60), the method comprising: forming a damascene gate having: a gate dielectric atop a substrate (12); a gate conductor (40) atop the gate dielectric; a conductive liner laterally adjacent the gate conductor (30); a spacer between the conductive liner and the substrate (20); and a first dielectric atop the gate conductor (60); removing a portion of the conductive liner (30); and depositing a second dielectric (60) atop a remaining portion of the conductive liner (30), such that the second dielectric is laterally adjacent both the first dielectric and the gate.