发明名称 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide such a technology that can make a via hole with high reproducibility even when a dual damascene process is conducted in the same chamber. SOLUTION: A via hole is formed in a first mask film on an interlayer insulation film and the interlayer insulation film so that it may reach the midway in the direction of thickness of the interlayer insulation film. A lower resist film is formed on the first mask film, and a second mask film having an opening corresponding to a wiring groove is formed thereon. Plasma of O<SB>2</SB>and CO is used in a chamber to etch the lower resist film, and the lower resist film is left on a part within the via hole. An opening that the planar shape of the opening of the lower resist film is imprinted is formed in the first mask film, and the lower resist film is removed and the via hole is dug more until a lower wiring is exposed. The interlayer insulation film is etched to the midway in the direction of the thickness so as to form a wiring groove. The wiring groove and the via hole are filled with a conductive member. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011100765(A) 申请公布日期 2011.05.19
申请号 JP20090252853 申请日期 2009.11.04
申请人 FUJITSU SEMICONDUCTOR LTD 发明人 OSHIRYOJI MICHIO;KAWAMURA TAKESHI;JINNO MAKOTO
分类号 H01L21/768;H01L21/3065 主分类号 H01L21/768
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