| 摘要 |
A latched comparator circuit. The latched comparator circuit comprises a first and a second output terminal (20a, 20b) for outputting a first and a second output voltage, respectively, of the latched comparator circuit (1). Furthermore, the latched comparator circuit comprises a cross-coupled pair of transistors (30a, 30b) operatively connected between the first and the second output terminal (20a, 20b) for providing a positive feedback in the latched comparator circuit (1). In addition, the latched comparator circuit comprises a reset terminal (40) for receiving a reset signal and reset circuitry arranged to balance the first and the second output voltage during a first phase of the reset signal and allow a voltage difference to develop between the first and the second output voltage during a second phase of the reset signal. Moreover, the latched comparator circuit comprises a load unit (55) operatively connected to the cross-coupled pair of transistors and a bias circuit (70) arranged to receive the reset signal and to bias the load unit (55) such that a conductivity of the load unit (55) is higher during the second phase of the reset signal than during the first phase of the reset signal, whereby said positive feedback is stronger during the second phase of the reset signal than during the first phase of the reset signal.
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