发明名称 |
SEMICONDUCTOR MEMORY DEVICE |
摘要 |
<p>PURPOSE: A semiconductor memory device is provided to reduce a voltage drop effect on a floating P+ region by using a diode with a smaller resistance than the resistance of the PMOS. CONSTITUTION: A second conductive well(110) is formed on the upper side of a first conductive substrate(100). A gate(172) is formed on the first conductive substrate. A first conductive well(130) is formed on the upper side of the second conductive well on one side of the gate. A first conducive ion implantation region(150) is formed on the upper side of the first conductive well on one side of the gate. A second conducive ion implantation region is formed on the upper side of the first conductive well.</p> |
申请公布号 |
KR20110052975(A) |
申请公布日期 |
2011.05.19 |
申请号 |
KR20090109741 |
申请日期 |
2009.11.13 |
申请人 |
DONGBU HITEK CO., LTD. |
发明人 |
KIM, JONG MIN;YOO, JAE HYUN |
分类号 |
H01L27/115;H01L29/78 |
主分类号 |
H01L27/115 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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