| 摘要 |
<p>A phase-locked loop having: an oscillator for forming an oscillating output signal; a frequency divider connected to receive the output of the oscillator and frequency divide it by a value dependent on a division control signal; and a phase comparator for comparing the phase of the divided signal and a reference signal to generate a control signal, the operation of the oscillator being dependent on the control signal; the output data to form a divided signal a division ratio controller configured to, when clocked by an input signal, generate a series of output data for forming the division control signal; the phase-locked loop having: a first mode of operation in which the frequency divider is operable to frequency divide the output of the oscillator by a value dependent on the output of the division ratio controller; and a second mode of operation in which the frequency divider is not operable to frequency divide the output of the oscillator by a value dependent on the output of the division ratio controller, and the division ratio controller is clocked by a signal that is independent of the output of the oscillator.</p> |
