发明名称 |
PROTECTIVE STRUCTURE OF SEMICONDUCTOR WAFER, METHOD FOR PROTECTING SEMICONDUCTOR WAFER, MULTILAYER PROTECTIVE SHEET USED THEREIN, AND METHOD FOR PROCESSING SEMICONDUCTOR WAFER |
摘要 |
Disclosed herein is a semiconductor wafer protection structure including a semiconductor wafer and a protective sheet overlaid on a circuit surface of the semiconductor wafer, wherein the protective sheet has a larger diameter than the outer diameter of the semiconductor wafer. <??>The invention provides semiconductor wafer protection structures and methods, and laminated protective sheet for use therein that enable prevention of damage to a wafer during grinding and transportation when the wafer is ground to an ultrathin thickness and transported. Also provided is a process for processing a semiconductor wafer whereby damage to the wafer can be reduced during application and cutting of an adhesive sheet. <IMAGE> |
申请公布号 |
KR20110052728(A) |
申请公布日期 |
2011.05.18 |
申请号 |
KR20117007476 |
申请日期 |
2003.08.21 |
申请人 |
LINTEC CORPORATION |
发明人 |
SENOO HIDEO;NAGAMOTO KOICHI;HORIGOME KATSUHIKO;OHASHI HITOSHI |
分类号 |
B24B37/04;H01L21/304;B24B37/30;H01L21/301;H01L21/48;H01L21/68;H01L21/683 |
主分类号 |
B24B37/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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