| 摘要 |
Each pixel region includes first and second pixel electrodes (17a, 17b) and first-third capacitor electrodes (67x-67z) each positioned on a layer where a data signal line (15) is positioned. One conductive electrode (9) of a transistor, the first pixel electrode (17a), and the second capacitor electrode (67y) are electrically connected with one another. Each of the first and third capacitor electrodes (67x, 67z) is electrically connected with the second pixel electrode (17y). The first-third capacitor electrodes are aligned in this order in a row direction in such a manner as to overlap a retention capacitor line (18) via a first insulating film, and the second capacitor electrode (67y) overlaps the second pixel electrode (17b) via a second insulating film. This allows increasing production yields of an active matrix substrate based on a capacitive coupling pixel division system and a liquid crystal panel including the active matrix substrate.
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