ADDRESS CONTROL CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE

摘要

PURPOSE: An address control circuit and a semiconductor memory device are provided to minimize screw in a write operation. CONSTITUTION: In an address control circuit and a semiconductor memory device, a command address input unit(1) is comprised of a plurality of pads and input buffers. A command decoder(2) generates a read command, a write command, and a burst command. A burst end signal generation unit(3) generates a read burst end signal and a write burst end signal. A read column address control circuit(4) generates a read column address. A data input/output unit(5) is arranged in a second edge area region. A write column address control circuit(6) generates a write column address.