发明名称 Method for realizing an electric linkage in a semiconductor electronic device between a nanometric circuit architecture and standard electronic components
摘要 A method for realizes electric connections in a semiconductor electronic device between a nanometric circuit architecture and standard electronic components. The method includes: providing a nanometric circuit architecture comprising a succession of conductive nanowires substantially parallel to each other and extended along a direction x; realizing, above the succession, an insulating layer; opening, in the insulating layer, a window of nanometric width b extended along a direction inclined by an angle α with respect to the direction x to substantially cross the whole succession of nanowires, with exposure of a succession of exposed portions of the nanowires, one for each nanowire; realizing, above the insulating layer, a plurality of conductive dies extended along a direction y substantially orthogonal to the direction x and addressed towards the standard electronic components, each of such dies overlapping said window onto a respective exposed portion of a nanowire with obtainment of a plurality of contacts realizing said electric connections.
申请公布号 US7945867(B2) 申请公布日期 2011.05.17
申请号 US20080971147 申请日期 2008.01.08
申请人 STMICROELECTRONICS S.R.L. 发明人 MASCOLO DANILO;CEROFOLINI GIANFRANCO
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项
地址